The present invention relates to a semiconductor device and a method for fabricating the same, more specifically, a semiconductor device including memory elements each having 1 transistor and 1 capacitor which can be fabricated by the standard logic LSI process, and the method for fabricating the same.
Recently in integrating a semiconductor device, the capacity of a RAM (Random Access Memory) to be mounted is required to be larger. This is because mounting a RAM is effective means to increase the function per an area, to the end of decreasing the input/output circuit number to reduce the area for cost reduction and power consumption decrease, and to the end of integrating the RAM on one semiconductor substrate to thereby make the bandwidth of the memory large to increase processing capacity, and other ends.
To these ends is proposed a memory circuit comprising memory elements of the type that the memory element stores charges in the capacitor, the quantity of the charges is sensed by one access transistor, and binary information is stored, as in the conventional dynamic memory, which are formed with good compatibility with the fabrication process of a logic LSI, and whose refreshing operation, etc. are performed by an intelligent control circuit, whereby the memory circuit behaves as an SRAM to the outside.
Such the semiconductor devices are disclosed in, e.g., Reference 1 (Specification of U.S. Pat. No. 6,573,548) and Reference 2 (Specification of U.S. Pat. No. 6,638,813), etc.